On 15 July 2026, the Union Cabinet cleared Semicon 2.0 with an outlay of Rs 1,27,500 crore (roughly $13 billion) as part of a wider package of decisions worth some Rs 2.19 lakh crore that also included a Rs 62,500 crore Mobile Phone Manufacturing Scheme.
In approving it, the government did something more consequential than write another cheque: it signalled that India's chip ambition has graduated from a proof-of-concept into a structural project that will ultimately be judged by how much of a semiconductor's value it can actually claim.
To understand why the second act builds logically on the first, it helps to be honest about what the first achieved. Under ISM 1.0, twelve manufacturing units were approved, mobilising cumulative investment north of Rs 1.64 lakh crore.
Three companies—Micron, Kaynes and CG Semi—have begun commercial production, with a fourth expected to follow within 2026. On the design side, 24 projects have won financial support, 105 start-ups have been given access to expensive industry-standard EDA tools, and some 68,000 students across 315 universities have been trained. For a country that made no chips at scale five years ago, this is a real beginning.
But if one looks closely at the composition of that success, the strategic logic of Semicon 2.0 comes into focus. Of the twelve approved units, nine were packaging plants; the rest comprised a single silicon fab, one silicon-carbide fab and one integrated gallium-nitride Micro LED display fab.
India's early foothold, in other words, clustered at the lower-value-added end of the chain like assembly, test and packaging, the ATMP/OSAT layer where entry barriers are lower and payback quicker. That was the sensible way to start. It is not, however, where the economic and strategic prizes sit.
The clearest marker of how far the front end still has to travel is Tata Electronics' Rs 91,000 crore fab at Dholera, built with Taiwan's PSMC. India's first true fab crossed the halfway mark in construction this year and is targeting first silicon by late 2026, running 28nm chips and scaling toward 22nm, with commercial output ramping through 2027–28. It is a genuine milestone, but a single 28nm line, however welcome, only underscores the distance between where India assembles chips today and where the world's leading fabs already operate.
From Attracting an Industry to Building One
Semicon 2.0 is, in essence, an attempt to move both up and outward from that base. Its six pillars read almost as a diagnosis of what ISM 1.0 left undone. The design pillar pushes India from merely using chips to owning the intellectual property behind them. This is not a standing start as global majors already run large design centres in Bengaluru, Hyderabad, and elsewhere, and some of the world's most advanced processors are partly designed on Indian soil even as they are fabricated abroad.
The gap Semicon 2.0 targets is ownership thus turning India from a design workshop for others into a source of its own IP and system designs.
The machines-and-materials pillar is the most telling addition. For the first time, the state is trying to incentivise the "picks and shovels" of the industry—the equipment, chemicals, gases and precision components that fabs consume, a supply layer ISM 1.0 barely touched and that today is dominated by a handful of firms in the United States, Japan, the Netherlands, and South Korea.
That the government unveiled the scheme alongside fresh commitments from exactly those incumbents with Lam Research pledging around $1.1 billion, Applied Materials, AMD and KLA roughly $400 million each and Microchip $300 million, with ASML and Merck signing memoranda, suggests it grasps the point: you cannot build a fab economy while importing every tool that goes into a fab.
The fabs pillar broadens the target from silicon alone to compound, discrete and display fabrication. The R&D pillar sets a deliberately harder goal: migrating from the 28–110nm nodes India is learning today toward genuinely advanced processes. Talent development, meanwhile, deepens rather than merely expands the pipeline, reaching beyond chip design into the harder-to-teach disciplines of clean-room operation and fab construction.
When read together, these pillars amount to a shift in ambition from attracting an industry to building one. ISM 1.0 was about persuading global players to plant flags on Indian soil; Semicon 2.0 is about widening participation across the value chain and deepening indigenous capability within it. That is why it is the harder half.
Assembly can be bought with subsidies and land; design IP, advanced process know-how and a domestic equipment base cannot. They require sustained R&D, patient capital and, crucially, access to technology that the incumbent leaders guard jealously. The larger outlay is therefore less a reward for past success than an acknowledgement that the next stretch is steeper.
Questions Still Unanswered
Yet for all its coherence, the scheme leaves important questions under-addressed. Its instrument remains, overwhelmingly, capital and production-linked incentives. Such a model risks fostering subsidy dependence unless paired with a credible path to commercial self-sufficiency.
There is little on the demand side: India consumes vast quantities of electronics but designs and fabricates little of what goes inside them, and an explicit strategy to anchor domestic chip demand would strengthen the investment case. The plan is also quiet on the unglamorous physical prerequisites of fabrication like assured supplies of ultra-pure water, uninterrupted power, and the environmental management that a water- and energy-hungry industry demands.
Most tellingly, the leap to advanced nodes and a home-grown equipment ecosystem depends on technology transfer that geopolitics increasingly constrains, and the framework says little about how India will secure it beyond hoping partners arrive. A sharper focus on export integration, on retaining scarce process-engineering talent rather than only training designers, and on realistic node-migration timelines would have made the ambition more bankable.
None of this diminishes the direction of travel. Union minister Ashwini Vaishnaw has said India aims to be among the world's top five chip ecosystems by 2029, and Semicon 2.0 is the right sequel precisely because it targets the gaps a first, foundational mission was always going to leave behind.
The measure of its success will be whether a decade from now, an Indian-designed IP block sits inside a chip fabricated on an Indian machine. Hopefully the mission march starts right away.
(Subimal Bhattacharjee is a defence and cyber security analyst and columnist focusing on technology, national security, and digital governance. This is an opinion piece and the views expressed are the author’s own. The Quint neither endorses nor is responsible for them. )